ID 原文 译文
1213 基于数字信号传播理论中的反射原理，采用反射系数刻画线路阻抗不匹配程度，利用线路阻抗匹配时测量得到的信道数据(直接信道、远端串扰信道和近端串扰信道)，建立了一个 G. fast 数字用户线路阻抗不匹配时信道数学模型。 Based on the reflection principle of digital signal propagation theory, a mathematical model of G. fast chan-nel is established when the impedance of digital subscriber line is not matched. The reflection coefficient is used to describethe line impedance mismatch and the channel data (direct channel, far-end crosstalk channel and near-end crosstalk channel)measured when line impedance matching are used in the model.
1214 当线路终端处于断开时，利用该模型生成的信道数据与实际测量的信道数据基本吻合，证明了该模型的正确性。 When the terminal is disconnected, the channel data calculat-ed by the model is consistent with the actually measured data, which proves the accurateness of the model.
1215 由于采用反射系数刻画线路阻抗不匹配程度，该信道模型可仿真终端设备在不同阻抗值的情况下对通信系统信噪比的影响，从而提出线路终端设备阻抗最大允许的变化范围，为终端设备制造商在阻抗设计时提供一定的理论指导。 Since the reflec-tion coefficient is used to describe the degree of impedance mismatch, the model can simulate the influence of the terminal e-quipment on the signal noise ratio of the communication system under different impedances. Therefore, we propose a maxi-mum allowable variation range of the terminal impedance which provides some theoretical guidance for terminal manufactur-er for designing terminal impedance.
1216 数据保持力是 NAND 闪存重要的可靠性指标， Data retention is an important reliability characteristic of NAND flash memory.
1217 本文基于用户在使用模式下，通过设计测试方法，研究了电荷捕获型 3D NAND 闪存初始阈值电压 －2V 至 3V 的范围内数据保持力特性。 Based on the user mode, this paper studies the data retention characteristics of charge trapping 3D NAND flash memory under different initial condi-tions.
1218 结果表明初始状态为编程态时，可以有效降低 NAND 闪存高温数据保留后的误码率， The results show that device programmed can effectively reduce the bit error rate after high-temperature data retentionof NAND flash memory.
1219 特别是随着擦写次数的增加，不同初始状态下电荷捕获型 3D NAND 闪存数据保持力差异更加明显， Especially with the increase of the number of erasing and writing, the data retention of charge-trap-ping 3D NAND flash memory is more obvious under different initial conditions.
1220 结论表明闪存最适宜存放的状态为 0 － 1V，电荷捕获型 3D NAND 闪存器件应避免长期处于深擦除状态。 The result shows that the flash memory ismost suitable for storage 0-1V, charge-trapping 3D NAND flash devices should avoid long-term deep erase conditions.
1221 并基于不同初始状态闪存高温数据保留后的数据保持力特性不同的现象进行了建模和演示， In ad-dition, modeled and demonstrated based on the phenomenon the threshold voltage offset after the high-temperature data re-tention of the flash memory is increased when initial state is erase state.
1222 通过设计实验验证，机理解释模型符合实验结果。 Through the design experiment, the mechanism fac-tor model accords with the experimental result.