ID | 原文 | 译文 |
43456 | 为解决小间距 LED 显示屏因寄生电容影响而产生的开路十字架问题,采用在模拟电路部分判断开路状态并产生开路信号, | A new kind of circuit was designed to solve the open cross problem caused by the parasitic capacitance of the fine-pitch LED displayscreen.In the analog circuit part, the open circuit state was judged and an open circuit signal was generated. |
43457 | 在数字部分根据开路信号记录开路位置并屏蔽输出的方式, | In the digital part, the open circuit position was recorded according to the open circuit signal and theoutput was shielded. |
43458 | 设计了一种新的检测过程简单、精确度高、面积小、功耗低、支持实时检测的电路, | The circuit detection method is simple, highly accurate and real time.And the chiphas small area and low power consumption. |
43459 | 并在某款多路恒流 LED 驱动芯片中得到应用,成功解决了开路十字架问题。 | It has been applied in a multi-channel constant current LEDdriver chip to successfully solve the open cross problem. |
43460 | 仿真结果和实际样片测试结果表明,所设计的开路检测电路检测精确简单、功耗低,并支持实时检测。 | The simulation and actual sample chip testresults show that the designed open detection circuit is accurate and simple to detect with low power consumption and supports real-time detection. |
43461 | 设计了一种带电流源校准电路的 16 bit 高速、高分辨率分段电流舵型数模转换器( DAC) 。 | A 16 bit high speed and resolution segmented current-steering digital-to-analog converter(DAC) with a current source calibration circuit was designed. |
43462 | 针对电流舵 DAC 中传统差分开关的缺点,提出了一种优化的四相开关结构。 | Aiming at the defect of traditional differential switch in current-steering DACs, an optimized quad-switch structure was proposed. |
43463 | 系统分析了输出电流、积分非线性和无杂散动态范围 ( SFDR) 三个重要性能指标对电流舵 DAC 的电流源单元设计的影响,完成了电流源单元结构和 MOS 管尺寸的设计。 | Influences ofthree important performance indexes of output current, integral nonlinearity and spurious free dynamicrange (SFDR) on the current source unit design of the current-steering DAC were systematically analyzed, and the designs of the current source unit structure and MOS transistor size were completed. |
43464 | 增加了一种优化设计的电流源校准电路以提高 DAC 的动态性能。 | Anoptimized current source calibration circuit was added to improve the dynamic performance of the DAC. |
43465 | 基于 0. 18 μm CMOS 工艺完成了该 DAC 的版图设计和工艺加工,其核心部分芯片面积为 2. 8 mm2。 | Based on the 0.18 μm CMOS process, the layout design and processing of the DAC were completed, andthe core chip area is 2.8 mm2. |