ID | 原文 | 译文 |
42276 | 为了研究高环境温度中 VCSEL 的温度稳定性和功率转换效率,通过测试不同环境温度下不同氧化孔径波长 850 nm VCSEL 的 P-I-V 曲线, | In order to study the temperature stability and power conversion efficiency of VCSELs at high ambient temperature, the P-I-Vcurves of 850 nm wavelength VCSELs of different oxide apertures under different ambient temperatureswere tested. |
42277 | 发现在相同注入电流下,随着环境温度的升高,VCSEL的氧化孔径越大,功率损耗增加越明显,而小氧化孔径的 VCSEL 功率损耗受温度的影响很小。 | It is found that at the same injection current, with the increase of ambient temperature, the larger the oxide aperture of the VCSEL is, the more obvious the increase of power consumption is, whilethe power consumption of VCSELs of small oxide aperture is little affected by temperature. |
42278 | 室温下 VCSEL 的氧化孔径越大,功率转换效率越高,但当环境温度高于一定值时,中等氧化孔径 ( 约 5 μm) 的 VCSEL 反而具有更高的功率转换效率。 | At room temperature, larger oxide aperture VCSELs present higher power conversion efficiency.But when the ambienttemperature is higher than a certain value, the medium aperture (about 5 μm) VCSEL shows a higherpower conversion efficiency. |
42279 | 通过分析温度对 VCSEL 微分电阻等功率损耗的影响,发现适当降低氧化孔径,有利于实现 VCSEL 在高环境温度中高的功率转换效率。 | By analyzing the influences of temperature on the differential resistance andother power consumption of VCSELs, it is found that proper reduction of the oxide aperture is conduciveto the realization of high power conversion efficiency of VCSELs at high ambient temperature. |
42280 | 为快速、准确地评估 Si3N4 薄膜的可靠性,参照联合电子设备工程委员会 ( JEDEC)的相关标准,采用斜坡电压法在 5 V/s 和 0. 5 V/s 两种加压速率下对厚度为 100 nm 的 GaAs 基Si3N4 薄膜进行测试,测试样品的总面积不小于 20 cm2。 | In order to quickly and accurately evaluate the reliability of the Si3N4 film, the GaAsbased Si3N4 film with a thickness of 100 nm was tested by the voltage-ramp method at the ramp rate of5 V/s and 0.5 V/s according to the relevant standards of the Joint Electron Device Engineering Council(JEDEC) , and the total area of the test samples was at least 20 cm2. |
42281 | 结合斜坡电压法的测试结果,评估该Si3N4 薄膜生产工艺的可靠性风险程度和 Si3N4 薄膜的耐压水平、缺陷密度和良率水平,并且为经时击穿 ( TDDB) 线性电场模型预估 Si3N4 薄膜的寿命提供可靠数据。 | Combined with the test results ofthe voltage-ramp method, the reliability risk degree of the Si3N4 film production process, and the voltagewithstand level, defects density and yield level of Si3N4 films were evaluated, which provided reliabledata for the estimation of the Si3N4 film lifetime by the time dependent dielectric breakdown (TDDB)linear electric field model. |
42282 | 结果表明,当目标良率为 99. 99%时,5 V/s 和 0. 5 V/s 下 Si3N4 薄膜的耐压值分别为 23 V 和 18 V;当目标良率为 95%时,5 V/s 和 0. 5 V/s 下 Si3N4 薄膜的耐压值分别为 87 V 和 82 V。 | The results show that when the target yield is 99.99%, the voltage withstandlevels of the Si3N4 film are 23 V and 18 V at 5 V/s and 0.5 V/s, respectively; when the target yield is95%, the voltage withstand levels of the Si3N4 film are 87 V and 82 V at 5 V/s and 0.5 V/s, respectively. |
42283 | 另外,该 Si3N4 薄膜的非本征击穿比例为 0. 11%,该类型的击穿数据可用于评估生产工艺的可靠性风险程度。 | In addition, the non-intrinsic breakdown ratio of the Si3N4 film is 0.11%, and the breakdown data ofthis type can be used to evaluate the reliability risk degree of the production process. |
42284 | 使用一次可编程结构对关键参数进行修调是提升集成电路精度及成品率的一种常用方法。 | It is a common method to improve the accuracy and yield of the integrated circuit to trimthe key parameters with a one-time programmable structure. |
42285 | 但是,传统的修调电路采用 I2C 等通信协议来控制修调过程,需要占用较多的集成电路引脚资源。 | However, the conventional trimming circuitscontrol the trimming process based on I2C or other communication protocols, which requires more integrated circuit pin resources. |