ID 原文 译文
53447 采用分立元件，设计了该系统的模拟电路，电路实验结果与数值仿真结果相吻合，为构建具有高性能的混沌保密通信系统奠定了基础。 An electronic circuit of the four-wing hyperchaotic system is designed and experimented with discrete components. Circuit experiment results are agreed well with the simulation results, and it lays a good foundation for designing chaotic secure communication with high performances.
53448 本文研究了总发射功率一定的条件下，网络雷达四种模式对 SWII 目标检测性能。 The detection performance of four kinds of Network Radar models to SWII targets was analyzed when the total power of single pulse of the transmitters is definite.
53449 分析和仿真结果表明，通道数一定时 RPNR 检测性能最好，MIMO 次之，NR 效果最差。 The simulated and analyzed results show that the RPNR detection performance is better than MIMO, MIMO is better than MW, and NR has the worst detection performance when the transmitters’ number is definite.
53450 MIMO 与 MW 模式的检测性能对通道数的变化不敏感，且脉冲数越多这种趋势越明显。 The MIMO and MW detection performance have a little change when the transmitters’ number have a large change, and the more the pulse number is, the more obvious the change trend is.
53451 针对具有低压触发特性的静电放电(electrostatic discharge，ESD)保护电路易闩锁的不足，本文结合 CSMC 0. 6μm CMOS 工艺，设计了一种可应用于 ESD 保护电路中的独立双阱隔离布局方案， Considering the deficiency that electrostatic discharge (ESD) protection circuit which has characteristic of low trigger voltage is easy to lead to latch-up, and combining with the CSMC 0. 6μm CMOS process, a layout scheme of independent double-well isolation that can be applied in the ESD protection circuit is presented in this paper.
53452 这种方案不仅可以有效的阻断形成闩锁的 CMOS 器件固有纵向 PNP 与横向 NPN 晶体管的耦合，且兼容原有工艺而不增加版图面积。 This scheme cannot only effectively block the coupling of the latched up CMOS device’s inherent vertical PNP and lateral NPN transistor, but also be compatible with the original process without increasing the layout area.
53453 将此布局方案与常规保护环结构同时应用于笔者研制的具有低压快速触发特性双通路 ESD 保护电路中， The scheme and the conventional guard ring structure are both applied to the dual-channel ESD protection circuit with characteristic of low-voltage triggering, which is developed by the author.
53454 通过流片及测试对比表明，该布局方案在不影响保护电路特性的同时， Fabricating and testing by comparison show that comparing with the conventional guard ring structure, in the meanwhile not affecting the characteristic of the protection circuit,
53455 较常规保护环结构更为有效的克服了保护电路的闩锁效应，从而进一步提升了该保护电路的鲁棒性指标。 this layout scheme is more effective in preventing the latch-up, which thereby further enhancing the circuit’s robustness.
53456 本文的布局方案为次亚微米 MOS ESD 保护电路版图设计提供了一种新的参考依据。 This layout scheme offers a new reference for the layout design of the sub-submicron MOS ESD protection circuit.