ID |
原文 |
译文 |
43326 |
测试结果表明,在 18 ~ 26 GHz 频率内,最大调幅深度大于 27 dB,插入损耗小于 8. 1 dB,输入电压驻波比小于 1. 3 ∶ 1,输出电压驻波比小于1.5 ∶ 1。 |
The measurement results show that in the frequency range of 18-26 GHz, the maximum depth of the amplitude modulation islarger than 27 dB, the insertion loss is less than 8.1 dB, input voltage standing wave ratio (VSWR) isless than 1.3 ∶ 1, output VSWR is less than 1.5 ∶ 1. |
43327 |
平衡式矢量调制器 MMIC 尺寸为 2. 4 mm×2. 5 mm,该电路具有插入损耗小、芯片尺寸小、功耗低等特点,可广泛应用于数字通信系统中。 |
The size of the balanced vector modulator MMIC is2.4 mm×2.5 mm.The MMIC has the characteristics of small insertion loss, small chip size and lowpower consumption, and could be wildly used in the digital communication applications. |
43328 |
研发了一款 W 波段四通道接收前端微波单片集成电路 ( MMIC) 。 |
A four-channel receiver front-end monolithic microwave integrated circuit (MMIC) composed of low noise amplifiers (LNAs) , mixers and local oscillator power dividers was designed and fabricated. |
43329 |
该接收前端包括低噪声放大器、混频器和本振功分电路。 |
The LNA uses five-stage common-source amplifier topology, and the mixer uses field effect transistorfor resistive third harmonic mixing. |
43330 |
低噪声放大器采用五级共源放大拓扑,混频器采用场效应晶体管进行阻性三次谐波混频;通道之间采用电阻隔离,以抑制信号泄露。 |
The resistor isolation could depress the signal leakage between channels. |
43331 |
对低噪声放大器和谐波混频器两个关键电路进行了设计和仿真,接收前端芯片面积为5.50 mm×4. 50 mm,采用标准GaAs PHEMT 工艺进行了流片并对其性能进行了测试。 |
The key circuits of the LNA and harmonic mixer were designed and simulated.The receiver frontend chip with an area of 5.50 mm×4.50 mm was fabricated based on standard GaAs PHEMT process andits performance was tested. |
43332 |
在片测试结果表明,在 88 ~ 104 GHz 频段内,通道增益为 5. 0~7. 5 dB,噪声系数小于 5. 2 dB,射频端口电压驻波比约为 2. 0;功耗约为0.48 W。 |
The on-wafer test results show that in the frequency range of 88-104 GHz, thechannel gain is 5.0-7.5 dB, the noise figure is lower than 5.2 dB, the voltage standing wave ratio of RFport is about 2.0 and the power consumption is about 0.48 W. |
43333 |
该接收前端芯片可广泛应用于 W 波段阵列电路中。 |
The receiver front-end chip can be widely usedin W-band array circuit. |
43334 |
SiC 功率模块随着输出功率增加,结温会随之明显上升,热阻增大,电学性能退化。 |
As the output power of the SiC power module increases, the junction temperature risessignificantly, the thermal resistance increases, and the electrical performances deteriorates. |
43335 |
因此,研究 SiC 模块热电性能,降低模块热阻和寄生电感对发挥 SiC 模块优良的电学特性非常关键。 |
Therefore, itis very important to study the thermoelectric properties and reduce the thermal resistance and parasitic inductance of the module to exert the excellent electrical properties of SiC modules. |