| ID | 原文 | 译文 |
| 43096 | 通过在悬栅状微结构支架上涂覆银纳米线，制备出亚微米级孔径的微电子机械系统( MEMS) 过滤芯片， | A micro-electromechanical system (MEMS) filter chip with sub-micron diameter of aperture was fabricated by coating silver nanowires on the suspended grid micro-structure frame. |
| 43097 | 并研究了该芯片的颗粒过滤性能以及相关影响因素。 | The particlefiltration performance of the filter chip and related impact factors were studied. |
| 43098 | 利用感应耦合等离子体 ( ICP) 深硅刻蚀工艺，在二氧化硅片上双面刻蚀形成悬栅状结构。 | Using the inductively coupled plasma (ICP) deep silicon etching process, a double-sided etching on a SiO2 wafer formed the suspended grid structure. |
| 43099 | 随后，利用分散液中银纳米线的均匀分布性和高比表面积，将高长径比的银纳米线均匀地涂覆到此结构的亲水性二氧化硅层上。 | Subsequently, the high aspect ratio silver nanowires were uniformly coated on thehydrophilic SiO2 layer of the structure using the uniform distribution and high specific surface area of thesilver nanowires in the dispersion. |
| 43100 | 干燥后，在重力及液体挥发作用下银纳米线和支架层紧密贴合，制成覆盖银纳米线过滤层的硅基 MEMS 过滤芯片。 | After drying, the silver nanowires and frame layer were laminated tightly under the action of gravity and liquid evaporation.The silicon-based MEMS filter chip with a silvernanowire filter layer was prepared. |
| 43101 | 与硅基支架结构相比，覆盖较低质量浓度银纳米线的芯片对 PM10－2. 5的过滤效率提高了 2. 5 倍，达到 73. 79%，压差仅增加了 30 Pa ( 空气流速为 0. 33 m /s) 。 | Compared with the silicon-based frame structure, the PM10－2.5 filtrationefficiency of the chip covering lower mass concentration of silver nanowires increases by 2.5 times to73.79%, and the pressure drop only increases by 30 Pa (air flow velocity is 0.33 m /s) . |
| 43102 | 当芯片覆盖有较 高 质 量 浓 度 的 银 纳 米 线 时，PM2. 5 过 滤 效 率 达 到 86. 63%; | When the chipis covered with a higher mass concentration of silver nanowires, the PM2.5 filtration efficiency reaches86.63%, |
| 43103 | PM10－2. 5 过滤效率上升到96.67%。 | the PM10－2.5 filtration efficiency increases to 96.67%. |
| 43104 | 在相同测试条件下，过滤芯片压差增加到 1 200 Pa。 | The pressure drop of the filter chip increases to 1 200 Pa under the same test conditions |
| 43105 | 研究了纳米线高度与纳米线宽度对 5 nm 制程垂直堆叠式环栅纳米线场效应晶体管( GAA NWFET) 中自热效应及微尺度空间效应的影响机理。 | The effect mechanism of height and width of nanowires on the self-heating effect and microscale spatial effect of the vertically stacked gate-all-around nanowire field effect transistor (GAA NWFET) in 5 nm technology were investigated. |