ID |
原文 |
译文 |
42806 |
4 英寸 ( 1 英寸= 2. 54 cm) 半绝缘 GaAs 单晶材料是目前制备微波毫米波单片集成电路等的主流材料, |
The 4-inch (1 inch = 2.54 cm) SI-GaAs single crystal material is the main material ofproducing microwave millimeter wave monolithic integrated circuits. |
42807 |
随着 5G 技术应用的普及,该材料的应用前景将更加广阔。 |
With the popularization of 5G technology, the application prospect test of SI-GaAs will be more broad. |
42808 |
但是由于采用常规垂直梯度凝固 ( VGF) 法晶体生长工艺所得的单晶尾部径向电阻率均匀性较差,严重影响了相关器件性能的一致性。 |
However, with the situation of poorradial resistivity uniformity of crystal tail grown by the routine vertical gradient freeze (VGF) method, the performance consistency of related devices was deeply affected. |
42809 |
对采用 VGF 和 ( VGF+垂直布里奇曼 ( VB) ) 两种晶体生长工艺所得的半绝缘 GaAs 单晶头尾径向电阻率不均匀性测试进行分析, |
The radial resistivity uniformities testof SI-GaAs single crystal at the tail and head grown by VGF and (VGF +vertical Bridgman (VB))methods were analyzed. |
42810 |
优化了 ( VGF+VB) 晶体生长相关工艺条件, |
The process conditions of (VGF+VB) crystal growth were optimized. |
42811 |
并确定了 VB 晶体生长部分比较合理的起始位置及生长速度。 |
The reasonable starting position and the growth speed of VB crystal were determined. |
42812 |
在保证晶锭头尾电阻率均达到108 Ω·cm以上的情况下,有效地降低了晶体尾部径向电阻率不均匀性,使其由原来的大于20%降低到小于 10%,提高了晶体质量。 |
The radial resistivity inhomogeneity of crystal tail was effectively reduced from more than 20% to less than 10%, under the condition that the resistivity of ingot head and tail reached more than 108 Ω·cm, and the crystal quality was greatly improved. |
42813 |
通过该工艺还可有效排杂到晶体尾部,增加高电阻率单晶有效长度。 |
Through this process, the impurity can be effectively discharged to the crystal tail and effective length of high resistivity single crystal can be increased. |
42814 |
采用化学液相沉积 ( CLD) 法在氧化铟锡 ( ITO) 导电玻璃和硅基板表面制备了大面积的氧化铝 ( Al2O3 ) 薄膜, |
Large area aluminum oxide (Al2O3) thin films were prepared on the surface of indiumtin oxide (ITO) coated conductive glass substrates and Si substrates by the chemical liquid deposition(CLD) method. |
42815 |
并以非腐蚀的方式在硅片表面使用 CLD 法直接生长图案化 Al2O3 薄膜。 |
A patterned Al2O3 thin film was directly prepared on the surface of silicon wafer in anon-etching way with the CLD method. |