ID 原文 译文
42666 器件的击穿电压达到1 953 V，开关比高达 109，器件功率品质因子为 77. 2 MV/cm2。 The fabricated device demonstrates a high breakdown voltage of 1 953 V, an on /off ratio of 109, and a power figure ofmerit of 77.2 MV/cm2.
42667 设计了一种集成数字内核和数模转换器 ( DAC) 的高速、高分辨率直接数字频率合成器 ( DDFS) 。 A high-speed and high-resolution direct digital frequency synthesizer (DDFS) which integrated the digital core and digital to analog converter (DAC) was designed.
42668 其核心模块相幅转换器采用混合坐标旋转数字计算 ( COＲDIC) 算法，以缩短幅度计算的时钟周期，减少硬件消耗。 The hybrid coordinate rotation digital computer (COＲDIC) algorithm was adopted in the core module phase-amplitude converter toreduce the clock cycle of the amplitude computation and hardware consumption.
42669 DDFS 电路采用多路并行结构，以降低核心运算模块的工作频率，采用多级交织采样实现低速信号到高速信号的采样，再将数据合成输出。 A multi-channel parallelstructure was used in the DDFS to reduce the operating frequency of the core computing module, and themulti-stage interleaved sampling was used to achieve the sampling of low-speed signals to high-speed signals, and then the data were synthesized and output.
42670 DAC 的设计采用温度计编码和二进制编码混合方式实现内部编码，采用双路归零编码方式实现信号输出。 The design of the DAC adopted a hybrid method ofthermometer coding and binary coding to realize the internal coding, and a dual return-to-zero codingmethod was adopted to realize the signal output.
42671 采用数字校准模块调整数字和模拟时钟的相位，确保信号从数字内核到 DAC 的正确采样。 A digital calibration module was used to adjust the phaseof the digital and analog clocks to ensure the correct sampling of the signal from the digital core to theDAC.
42672 基于65 nm1P8M CMOS 工艺完成 DDFS 芯片的设计和流片，芯片面积为 3. 5 mm × 4. 7 mm。 The DDFS chip with an area of 3.5 mm×4.7mm was designed and fabricated based on 65 nm 1P8MCMOS process.
42673 经测试在3.4 GHz的时钟频率下，输出信号频率约为 1. 36 GHz，窄 带 无 杂 散 动 态 范 围 ( SFDＲ) 为89. 75 dB;宽带 SFDＲ 为 39. 61 dB。 The measured narrowband spurious-free dynamic range (SFDＲ) is 89.75 dB and widebandSFDＲ is 39.61 dB with an output signal frequency of about 1.36 GHz at a clock frequency of 3.4 GHz.
42674 以吡咯 ( Py) 单体与氧化石墨烯 ( GO) 混合液作为前驱体，通过改变二者的摩尔比，采用控制电位电解库仑力法沉积了聚吡咯 ( PPy) 薄膜与 PPy /GO 复合薄膜。 Polypyrrole (PPy) films and polypyrrole /graphene oxide (PPy /GO) composite filmswere deposited with the mixture of pyrrole (Py) and GO as precursor at different molar ratios by bulkelectrolysis with coulometry method.
42675 通过扫描电子显微镜 ( SEM) 、傅里叶变换红外 ( FT-IＲ) 吸收光谱、拉曼光谱和 X 射线衍射 ( XＲD) 对所制备薄膜的结构和形貌进行了表征，并对 PPy 和 PPy /GO 薄膜进行了电化学性能测试。 The structure and morphology of the samples were characterized byscanning electron microscope (SEM) , Fourier transformation infrared (FT-IＲ) absorption spectrum, Ｒaman spectrum and X-ray diffraction (XＲD) , respectively.The electrochemical performances of PPy andPPy /GO films were tested.