ID |
原文 |
译文 |
42536 |
该开关滤波器芯片频率覆盖 9. 85 ~ 12. 4 GHz,尺寸为 4. 5 mm×4. 5 mm×0. 15 mm。 |
The operating frequency of the switching filter chip covers 9.85 - 12.4 GHz and the chip size is 4.5 mm ×4.5 mm×0.15 mm. |
42537 |
探针在片测试结果表明,开关滤波器芯片 4 个支路的中心插入损耗均小于 6. 2 dB,通带内回波损耗优于17 dB,典型的带外衰减大于 40 dB。 |
The probe test results show that the insertion loss at center frequency of each channelis less than 6.2 dB, the in-band return loss is better than 17 dB, and the typical out-of-band attenuationis more than 40 dB. |
42538 |
设计并实现了一款超宽带高速模数转换器 ( ADC) 芯片。 |
An ultra-wideband high speed analog-to-digital converter (ADC) chip was designed andfabricated. |
42539 |
该 ADC 采用时间交织的架构,提高了数据转换的速率; |
A time-interleaved architecture was adopted to increase the data conversion rate. |
42540 |
改进了前端接收电路,增加了信号的模拟输入带宽; |
The front-endreceiving circuit was improved to increase the analog input bandwidth of the signal. |
42541 |
使用优化的自举开关电路以增加信号采样率; |
The optimized bootstrapped switch circuit was utilized to increase the signal sampling rate. |
42542 |
并通过高速的自校准比较器,校准比较器的输入失调电压,保证信号量化的速度。 |
The high speed self-calibratingcomparator was adopted to calibrate the input offset voltage, which ensured the signal quantization speed. |
42543 |
基于 40 nm CMOS 工艺对该 ADC 进行了设计和流片。测试结果表明: |
The ADC was designed and implemented based on 40 nm CMOS process. |
42544 |
该 ADC 芯片采样率可达 36 GS / s,3 dB 带宽可达 18 GHz,且在模拟输入信号的全频带内,有效位数 ( ENOB) 可达2. 5 bit以上。 |
The test results show that thesampling rate of the ADC chip can reach 36 GS / s, the 3 dB bandwidth can reach 18 GHz and the effective number of bits (ENOB) can reach more than 2.5 bit in the full band of the analog input. |
42545 |
该芯片可以对 DC ~ 18 GHz 内的射频信号直接采样,简化超宽带接收机的结构,满足超宽带接收系统的应用需求, |
This chip can directly sample the RF signal in DC-18 GHz, simplify the structure of the ultra-wideband receiverand satisfy the application requirements of the ultra-wideband receiving system. |