ID 原文 译文
42316 该开关采用 0. 13 μm SiGe BiCMOS 工艺实现，测试结果表明，在 25 ～ 40 GHz频率范围内，接收模式下，插入损耗 S31 小于 4 dB，回波损耗 S11 和 S33 分别小于－ 10. 8 dB 和－11. 8 dB; The SPDT switch wasrealized by 0.13 μm SiGe BiCMOS process.The test results show that, in range of 25－40 GHz, the insertion loss (S31) is less than 4 dB, and the return loss (S11 and S33) is less than －10.8 dB and－11.
42317 发射模式下，插入损耗 S21小于 1. 8 dB，1 dB 压缩点输出功率大于 18. 2 dBm，隔离度S32大于 19 dB，回波损耗 S11和 S22分别小于－14. 6 dB 和－15. 9 dB。 8 dB respectively in the receiving mode; the insertion loss (S21) is less than 1.8 dB, the 1 dBcompression point input power is more than 18.2 dBm, the isolation (S32) is more than 19 dB, and thereturn loss (S11 and S22) is less than －14.6 dB and －15.9 dB respectively in the transmission mode.
42318 该 Ka 波段非对称单刀双掷开关芯片的核心面积仅 0. 21 mm2。 The core circuit area of the Ka-band asymmetric SPDT switch chip is only 0.21 mm2.
42319 为满足射频微波应用的需求并实现三维异质集成，提出了一种带有大尺寸空腔结构的硅通孔 ( TSV) 转接板，研究了其空腔金属化与表面金属再布线层 ( ＲDL) 一体成型技术。 To meet the requirements of ＲF ＆ microwave applications and to achieve 3D heterogeneous integration, a new type of trough silicon via (TSV) interposer with large size cavity structure wasproposed.The integrated forming technology of cavity metallization and surface metal redistribution layer(ＲDL) was studied.
42320 首先，刻蚀空腔并整面沉积一层 2 μm 厚的 SiO2 ; Firstly, the cavity was etched and a layer of SiO2 with the thickness of 2 μm was deposited on the whole surface.
42321 然后，在不损伤其他部分绝缘层的条件下，通过干法刻蚀完成 TSV 背面 SiO2 刻蚀; Then, the backside SiO2 etching of TSV was completed by dry etching without damaging the other insulation layers.
42322 最后，通过整面电镀实现空腔金属化和 ＲDL 一体成型，并通过金属反向刻蚀形成 ＲDL。 Finally, the cavity metallization and ＲDL were formed integrally by the whole surface plating and the ＲDL was formed by reverse metal etching.
42323 重点研究了对 TSV 背面 SiO2 刻蚀时对空腔拐角的保护方法，以及在形成表面 ＲDL 时对空腔侧壁金属层的保护方法。 Then, the backside SiO2 etching of TSV was completed by dry etchingwithout damaging the other insulation layers.The protection method for the corners of cavity when the backside SiO2 etching of TSV was studied, and the protection method for the metal layer on the cavity side wall during the formation of ＲDL was also emphatically studied.
42324 最终获得了带有 120 μm 深空腔的 TSV 转接板样品，其中空腔侧壁和表面 ＲDL 的金属层厚度均为 8 μm。 At last, TSV interposer samples with the cavity depth of 120 μm were obtained, and the thicknesses of metal layer on the side wall of the cavity and on the surface ＲDL were both 8 μm.
42325 采用快速原位磷注入法合成 InP 熔体，采用液封直拉 ( LEC) 法生长了掺 Fe 半绝缘 InP单晶。 A rapid in-situ phosphorus injection method was used to synthesize InP melt, and theliquid encapsulated Czochralski (LEC) method was used to grow Fe-doped semi-insulating InP single crystal.