ID 原文 译文
42226 该运算放大器采用双极型工艺流片。 The power operational amplifier was fabricated in a bipolar process.
42227 实测结果表明: 该功率运算放大器的输入失调电压小于 1 mV，输入失调电流小于 2 nA，开环电压增益大于 120 dB，增益带宽积大于 4. 5 MHz，短路电流大于 100 mA，压摆率大于 1. 5 V/μs。 The test results show that the input offset voltage is lower than 2 nA, the input offset current is smaller than 1 mA, the open loop voltage gain is greater than 120 dB, gain bandwidth product is higher than 4.5 MHz, theshort circuit current is larger than 100 mA, and the slew rate is greater than 1.5 V/μs.
42228 设计了一种逐次逼近寄存器型模数转换器 ( SAＲ ADC) 。 A successive approximation register analog-to-digital converter (SAＲ ADC) wasdesigned.
42229 提出了一种新型全动态钟控比较器结构，消除了比较器的亚稳态误差，解决了 ADC 输出不稳定的问题，实现了失调和噪声之间良好的折中，提升了 ADC 的动态性能; A new clock-controlled full dynamic comparator structure was presented, the meta-stabilityerror of the comparator was eliminated, and the unstable problem of ADC output was solved, therefore acompromise between offset and noise was realized, and the dynamic performance of the ADC was improved.
42230 设计了一种全新的自举开关，在确保采样保持电路性能的同时提高了其可靠性; A new bootstrap switch was designed to ensure the performance and to improve the reliability ofthe sample-and-hold circuit.
42231 提出了一种新颖的正反馈结构的动态逻辑单元，并应用在逐次逼近逻辑电路中，在降低功耗的同时消除了误码问题; A novel dynamic logic cell with a positive feedback structure was presentedand used in the successive approximation logic circuit, and bit errors were eliminated while the powerconsumption was reduced.
42232 改进了共模电平产生电路结构，提高了共模电平的产生速度和稳定性。 The common-mode level generation circuit structure was improved forimproving the generating speed and the stability of the common-mode level.
42233 电路采用 0. 18 μm DB S-BCD 工艺设计实现，芯片面积约为 360 μm×560 μm，10 bit 分辨率模式下的功耗和信噪失真比 ( SNＲD) 分别为 21. 1 μW 和 58. 64 dB。 The circuit chip with an areaof about 360 μm×560 μm was designed and fabricated in 0.18 μm DB S-BCD process.The power consumption and signal to noise distortion ratio (SNＲD) in 10 bit mode is 21.1 μW and 58.64 dB, respectively.
42234 基于 GaAs 赝配高电子迁移率晶体管 ( PHEMT) 工艺，研制了一款 0. 8 ～ 2. 7 GHz 的高线性驱动放大器。 A high linearity driver amplifier operating from 0.8 GHz to 2.7 GHz was designed andfabricated based on the GaAs pseudomorphic high electron mobility transistor (PHEMT) process.
42235 电路放大部分采用多胞合成技术，避免了工艺对栅宽的限制，同时可以提升输入和输出阻抗。 The multi-cell synthesis technology was adopted in the amplifying part of the circuit to avoid the process limitation of gate width, and the input and output impedance can be improved.