ID 原文 译文
42056 通过优化电路匹配结构，选择合适的有源器件和恰当的直流偏置条件，实现低视频漏极阻抗; By optimizing the circuit matching structure and selecting the appropriate active device and DC biascondition, low video drain impedance was realized.
42057 利用后级增益压缩和前级增益扩张对消等手段，实现高功率附加效率和好的线性指标。 By means of rear gain compression and front gainexpansion offset, high power additional efficiency and good linearity index were realized.
42058 功率放大器芯片尺寸为 2. 35 mm×1. 40 mm。 The chip size ofthe power amplifier is 2.35 mm×1.40 mm.
42059 芯片测试结果表明，在 3. 7 ～ 4. 2 GHz 频率范围内，漏极电压 28 V、末级栅极电压－2. 2 V、前级栅极电压－1. 8 V 和连续波条件下，该功率放大器的小信号增益大于 25 dB，大信号增益大于 20 dB，饱和输出功率大于 39 dBm， The chip test results show that in the 3.7－4.2 GHz frequency range, and under the conditions of the drain voltage of 28 V, the final stage gate voltage of －2.2 V, thefront stage gate voltage of －1.8 V and continuous wave, the small signal gain of the power amplifier isgreater than 25 dB, the large signal gain is greater than 20 dB, and the saturation output power isgreater than 39 dBm.
42060 在输出功率回退至 32 dBm 时，功率附加效率大于 30%，三阶交调失真小于－37 dBc。 When the output power backs off to 32 dBm, the power additional efficiency isgreater than 30% and the third-order intermodulation distortion is less than －37 dBc.
42061 工作在饱和区的 MOSFET 存在零温度系数 ( ZTC) 特定工作点，基于这一特性设计实现了一款具有低温度系数的电压基准芯片。 A voltage reference chip with low-temperature coefficient was designed based on thecharacteristic of the zero temperature coefficient (ZTC) specific operating point of the MOSFET workingin the saturation region.
42062 所设计的电路利用 ZTC 工作点的温度系数接近于 0这一特点，辅以高阶曲率补偿电路，实现极低温度系数的输出电压。 Based on the advantage of the feature that the temperature coefficient of the ZTCoperating point was close to zero, and supplemented by a high order curvature compensation circuit, anoutput voltage with extremely low-temperature coefficient was realized.
42063 此外，针对 ZTC 工作点对工艺偏差的敏感性，根据蒙特卡洛仿真结果，专门设计了熔丝修调电路，以保证电路的输出结果具有较高工艺稳定性。 In addition, in view of the sensitivity of the ZTC operating point to process deviation and according to the Monte Carlo simulation results, the fuse trimming circuit was specially designed to ensure a high process stability of the output result ofthe circuit.
42064 该电路在 CSMC 0. 18 μm CMOS 工艺平台进行了流片验证，芯片面积为 0. 002 5 mm2。 The proposed circuit was fabricated and verified with the CSMC 0.18 μm CMOS process platform, and the chip area is 0.002 5 mm2.
42065 结果表明该芯片在室温时能够稳定输出 475. 5 mV 电压，在－40 ～ 125 ℃ 内，温度系数达到 1. 8×10－6 /℃，在 10 kHz 时电源抑制比达到－68. 7 dB。 The results show that the chip can stably output 475.5 mVvoltage at room temperature, the temperature coefficient reaches 1.8×10－6 /℃ within －40－125 ℃, andthe power supply rejection ratio reaches －68.7 dB at 10 kHz.