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41976 静态随机存储器 ( SRAM) 是集成电路中重要的存储结构单元。 The static random access memory (SRAM) is an important storage unit in integrated circuits.
41977 由于其制备工艺复杂、关键尺寸较小、对设计规则的要求最为严格,因此 SRAM 的质量是影响芯片良率的关键因素。 Because of its complex preparation process, small critical dimension and strict design rules, thequality of SRAM is the key factor affecting the yield of chip.
41978 针对一款微控制单元 ( MCU) 芯片的 SRAM 失效问题,进行逻辑地址分析确认失效位点, In order to solve the problem of SRAMfailure of a micro control unit (MCU) , logical address analysis was carried out to confirm the failure site.
41979 通过离子聚焦束 ( FIB) 切片及扫描电子显微镜 ( SEM) 分析造成失效的异常物理结构, The abnormal physical structure caused by the failure was analyzed by focused ion beam (FIB) slice andscanning electron miroscopy (SEM) .
41980 结合平台同类产品的设计布局对比及生产过程中光刻工艺制程的特点,确认失效的具体原因。 Combined with the design layout comparison of similar products of the platform and the characteristics of lithography process in the production process, the specific cause ofthe failure was confirmed.
41981 对可能造成失效的工艺步骤或参数设计实验验证方案,根据验证结果制定相应的改善措施, For the process steps or parameters that may cause failure, the experimental verification scheme was designed, and the corresponding improvement plan was made according to theverification results.
41982 通过良率测试及 SEM 照片确认改善结果,优化工艺窗口。 The improvement results are confirmed by the yield test and SEM images, and theprocess window is optimized.
41983 SRAM 中多晶硅线布局方向与测试单元中一致时,工艺窗口最大,良率稳定; When the layout direction of polysilicon lines in SRAM is consistent withthat in the test cell, the process window is the largest and the yield is stable.
41984 因此在芯片设计规则中明确 SRAM 结构布局方向,对于保证产品的良率具有重要意义。 Therefore, it is importantto specify the layout direction of the SRAM structure in chip design rules to ensure the yield of products.
41985 为了研究硅通孔 ( TSV) 转接板及重离子种类和能量对 3D 静态随机存储器 ( SRAM)单粒子多位翻转 ( MBU) 效应的影响,建立了基于 TSV 转接板的 2 层堆叠 3D 封装 SRAM 模型, In order to study the effects of the through silicon via (TSV) interposer and heavy ionspecies and energies on single event multiple bit upset (MBU) effect of 3D static random access memory(SRAM) , a two-die stacked 3D package SRAM model based on the TSV interposer was constructed.