ID 原文 译文
40696 仿真结果表明峰值转换效率可达到90.6%。 The simulation results show that the peak conversion efficiency can reach 90.6%.
40697 相关滤波类跟踪算法采用循环矩阵生成训练样本进行相关性检测时会导致边界效应问题，目标偏离检测区域中心位置越远，边界效应问题越严重。 The boundary effect problem can be caused when the correlation filtering tracking algorithm uses the cyclic matrix to generate training samples for correlation detection.The farther the target is deviates the center of the detection area, the more serious the boundary effect problem will be.
40698 为解决上述问题，在BACF算法基础上提出了基于相关性区域修正的背景感知相关滤波跟踪方法。 In order to solve the above problems, the method of correcting correlation region for background-aware correlation filter tracking based on BACF algorithm is proposed.
40699 该方法针对灰度和彩色视频采用不同的多特征融合方式进行特征提取，对于新视频帧采用边缘轮廓检测算法使其修正相关性检测区域的范围及中心位置，使被跟踪目标的相关性检测区域更加合理，让被跟踪目标尽可能的位于相关性检测区域的中心位置，从而达到缓解边界效应的效果。 The method uses different multi-feature fusion methods for feature extraction for grayscale and color videos.For new video frames, edge contour detection algorithms are used to correct the range and center position of the correlation detection area, so that the correlation detection area of the tracked target more reasonable, let the tracked target be located in the center of the correlation detection area as much as possible, so as to achieve the effect of alleviating the boundary effect.
40700 使用OTB100数据集进行验证，结果表明改进后的算法有效促进了基础跟踪算法的精度和成功率性能。 The experiment uses OTB100 data sets.The experimental results show that the improved algorithm effectively promotes the accuracy and success rate performance of the basic tracking algorithm.
40701 现有忆阻器的三值逻辑电路设计中无法级联且无法保存输入输出值，导致面积开销和功耗增加。 The existing ternary logic circuit of memristors cannot be cascaded and cannot store input and output values, which leads to the increase of area overhead and power consumption.
40702 通过对忆阻器辅助逻辑进行扩展，设计了忆阻器的三值逻辑门，具备三值逻辑的完备性。 Considering the characteristics of memristors and ternary logic, several ternary logic gates extended from MAGIC-Memristor-Aided Logic are proposed.
40703 在此基础上设计实现了三值译码器和三值加法器。 Starting with the basic ternary logic gates, the ternary decoder and the ternary adder are realized.
40704 使用Spice仿真软件对所设计的电路进行了验证。 The circuit was verified by SPICE simulation software.
40705 结果表明：与已有的文献进行比较，所提出的电路面积和功耗有所减少。 The results show that the proposed circuit area overhead and power consumption are reduced compared with the existing literatures.