ID 原文 译文
23765 该文研究适用于高阶 QAM 调制的自适应解调算法，并结合无率纠错码提出一种收端速率自适应方案。 In this paper, an adaptive demodulation algorithm used for higher order Quadrature Amplitude Modulation (QAM) is studied. A rate adaptive scheme at receiver is proposed which combines this algorithm and rateless error correcting codes.
23766 收端将符号中每个比特的对数似然比绝对值与设定的解调门限值比较，大于该解调门限值的比特解调，否则删除。 The bits in received symbols with absolute log-likelihood ratio value higher than demodulation threshold are demodulated, otherwise, deleted.
23767 无率码译码码字长度固定，通过调整解调门限达到误码性能要求。 In the scheme, the length of the codeword for the rateless codes decoding is fixed, and error performance is achieved by adjusting the demodulation threshold.
23768 在解调比特的平均互信息分析的基础上，给出不同信噪比下达到期望的译码误码性能要求的解调门限值及解调比例的计算方法。 Based on the analysis of the average mutual information of the demodulation bits, the calculation method is given of the log-likelihood ratio demodulation threshold and demodulation bits ratio under different signal-to-noise ratio.
23769 以 256-QAM 星座和 Raptor 码为例给出方案设计实例并进行仿真，仿真结果验证了理论分析的正确性和方案的有效性。 A sample design scheme employing 256-QAM constellations and Raptor codes is provided, and the simulation results of this sample are consistent well with those of the theoretical analysis, which confirms the effectiveness of the scheme.
23770 在分析电荷泵结构、工作原理和产生杂散机理的基础上，该文提出了一种低静态电流失配、低时序失配的高性能电荷泵。 On the basis of the analysis of the structure, operation principle and mechanism of generating spurs of the charge pump, a charge pump with a low static current mismatch and a low timing mismatch is proposed.
23771 此电荷泵通过减小电荷泵开关过程中时序失配和电流失配，减小了高频锁相环中的抖动和杂散。 This charge pump suppresses the jitter and spurs in high-speed Phase-Looked Loops (PLL) by improving the timing mismatch and the current mismatch during switching in the charge pump.
23772 基于中芯国际 0.18 μm CMOS 射频工艺技术和 1.8 V 电源电压，对采用此高性能电荷泵的锁相环进行了相位噪声仿真。 Based on the SMIC 0.18 μm CMOS radio frequency technology with 1.8 V power supply, the phase noise simulation of the PLLs adopting the proposed charge pump is performed.
23773 仿真结果验证了这些锁相环具有低噪声特性：在 480 MHz 的输出频率下，二阶锁相环的周期抖动为 1.05 ps，最大参考杂散为-121 dBc。 The simulation results demonstrate that those PLLs achieve a low noise performance: the second-order PLL shows a period jitter of 1.05 ps and the largest reference spur of -121 dBc with the PLL output frequency of 480 MHz.
23774 该文设计了一种基于 SRAM 物理不可克隆函数(PUFs)的高效真随机种子发生器。 An efficient design of truly random seed generator based on SRAM Physical Unclonable Functions (PUFs) is proposed in this paper.