ID 原文 译文
18095 最后利用识别出的码长以及本原多项式，构建本原多项式下GF(2m)，进行连续码根匹配判决，最终完成码生成多项式识别。 Finally, under the identified code length and the primitivepolynomial, the GF (2m) is constructed, and the continuous code root matching decision is made, then thegeneration polynomial is recognized.
18096 仿真结果表明：推导的平均校验符合度统计特性与实际情况一致，算法能在低信噪比下有效完成参数识别； The simulation results show that the derived statistical characteristics ofthe average check conformity are consistent with the actual situation, and the proposed algorithm caneffectively recognize parameter under low Signal-to-Noise Ratio (SNR).
18097 同时该算法具有较好的低信噪比适应能力，在信噪比为6 dB条件下，工程中常见的RS码识别率均能达到90%以上。 At the same time, the proposedalgorithm has good adaptability to low SNR. At SNR of 6 dB, the recognition rate of common RS codes inengineering can reach more than 90%.
18098 与现有算法相比，该文算法性能明显好于硬判决算法，且比传统算法提升1 dB以上性能。 Compared with the existing methods, the performance of this algorithmis better than hard-decision algorithm, besides, it is improved by more than 1 dB compared by traditionalalgorithms.
18099 该文提出了一种用于高速高精度电荷域流水线模数转换器(ADC)的电荷域4.5位前端子级电路。 A 4.5 bit sub-stage circuit for high speed high precision charge domain pipelined Analog-to-DigitalConverter (ADC) is proposed.
18100 该4.5位子级电路使用增强型电荷传输(BCT)电路替代传统开关电容技术流水线ADC中的高增益带宽积运放来实现电荷信号传输和余量处理，从而实现超低功耗。 Instead of the high-performance opamps used in traditional switched-capacitorpipelined ADCs, charge transfer and residue charge calculation is realized with Boosted Charge Transfer (BCT)circuit in the proposed 4.5 bit sub-stage.
18101 所提4.5位子级电路被运用于一款14位210 MS/s电荷域ADC中作为前端第1级子级电路，并在1P6M 0.18 mm CMOS工艺下实现。 Therefore, the power consumption of the 4.5 bit sub-stage circuit canbe reduced remarkably. The proposed 4.5 bit sub-stage circuit is used as the 1st stage circuit for a 14 bit 210MS/s charge domain pipelined ADC and realized in a 1P6M 0.18 mm CMOS process.
18102 测试结果显示，该14位ADC电路在210 MS/s条件下对于30.1 MHz单音正弦输入信号得到的无杂散动态范围为85.4 dBc，信噪比为71.5 dBFS, ADC内核面积为3.2 mm2，功耗仅为205 mW。 Test results show the 14 bit210 MS/s ADC achieves the signal-to-noise ratio of 71.5 dBFS and the spurious free dynamic range of 85.4 dB,with 30.1 MHz input single tone signal at 210 MS/s, while the ADC core consumes the power consumption of205 mW and occupies an area of 3.2 mm2.
18103 协同跨平面会话中断攻击(CXPST)通过反复对多条目标关键链路实施低速率拒绝服务攻击(LDoS)造成域间路由系统的级联失效，从而导致互联网的崩溃。 Coordinated Cross Plane Session Termination (CXPST) repeatedly implements Low rate Denial ofService (LDoS) attacks on multiple target critical links, causing the cascading failure of the inter-domainrouting system and the collapse of the internet.
18104 在攻击发生的初期，准确定位受攻击的关键链路并进行针对性防御可遏制级联失效的发生。 In the early stages of an attack, accurately locating the criticallink under attack and carrying out targeted defense can prevent the occurrence of cascading failures.