ID 原文 译文
15375 为完成12路传感器信号的采集、4路电压电流的采集,对硬件电路进行了详细的分析与优化。 In order to complete the collection of 12 channels of sensor signal and the collection of 4 channels of voltage and current, the hardware circuit is analyzed and optimized in detail.
15376 待采集信号先后通过信号调理、模拟开关、分压跟随以及抗混叠滤波对其进行处理,并对链路的建立时间进行分析,最后采用逐次逼近型AD芯片进行转换,通过与上位机配合验证数据的采集精度。 The signal to be collected is processed by signal conditioning, analog switch, voltage division follow-up and anti-aliasing filtering, and the establishment time of the link is analyzed. Finally, the successive approximation AD chip is used for conversion. Verification of data collection accuracy through cooperation with the host computer.
15377 经过大量实验数据验证,采集精度均能优于0.5%,达到任务要求。 After a lot of experimental data verification, the collection accuracy can be better than0. 5 %, meeting the task requirements.
15378 国际标准ISO/IEC18000-6规定脉冲间隔编码(PIE)作为RFID数字基带系统中阅读器发送链路的编码方式。 The international standard ISO/IEC18000-6 stipulates pulse interval encoding(PIE) as the encoding method of the reader transmission link in the RFID digital baseband system.
15379 采用Verilog语言对该模块进行设计,用QuartusⅡ软件综合并下载到FPGA开发板上,并使用SignalTapⅡ逻辑分析仪对信号进行采集和分析。 It uses Verilog language to design the module, synthesizes with Quartus II software and downloads it to FPGA development board, then use SignalTap II logic analyzer to collect and analyzethe signal.
15380 此外,在设计的基础上添加了UART收发模块,实现PC和FPGA板的通信。为了对PIE编码进行充分验证,基于UVM验证方法学和直接编程接口C(DPI-C),设计并实现了一种高效且可复用的验证平台,驱动器和监测器分别实现向DUT发送激励及收集输出结果的功能。 In addition, the UART transceiver module is added on the basis of the design to realize the communication between PC and FPGA board.In order to fully verify the PIE code, based on UVM verification methodology and direct programminginterface C(DPI-C), an efficient and reusable verification platform was designed and implemented. The driver and the monitor were implemented to send excitation and the function of collecting output results.
15381 参考模型与DUT的输出结果在记分板中对比一致,功能覆盖率达到了100%,提高了验证效率及完备性。 The output results of the reference model and DUT are consistent in the scoreboard,and the function coverage reaches 100 %, which improves efficiency and completeness of the verification.
15382 针对PTP授时精度测量存在的困难,提出在ZYNQ SOC上用μCOS操作系统和LWIP协议栈,来实现PTP授时精度测量。 Aiming at the difficulties of PTP timing accuracy measurement, this paper puts forward using μCOS operating system and LWIP protocol stack on ZYNQ SOC to realize PTP timing accuracy measurement.
15383 该方法通过接收卫星导航系统信号,得到准确的系统时间和时钟源差,利用硬件将系统时间同步至ZYNQ的纳秒计数器。 Accurate system time and clock source difference are obtained by receiving GNSS signals, and the system time is synchronized to the nanosecond counter of ZYNQ by hardware.
15384 利用ZYNQ EMAC接口获取PTP收发帧的观测时间,并利用源差值实现对测量时间的补偿,最终得到准确的时间戳,进而实现对待测PTP主时钟授时精度测量。 The ZYNQ EMAC interface is used to acquire the observation time of PTP frames, and the source difference is used to compensate the measurement time. Finally, an accurate time stamps are obtained, which can be used to measure the timing accuracy of the PTP master clock.