ID 原文 译文
15125 Tempus-PI提供一个真正的时序和电压降协同仿真的签核流程,以此来帮助找到真正的电压敏感的关键路径。 Tempus Power Integrity provides a true signoff so-lution for concurrent IR drop and timing, which helps us find the real critical timing path with voltage sensitive.
15126 该仿真工作的结果得到了芯片测试的一致性验证。 And this simula-tion results are well correlated and verified by silicon testing.
15127 和传统的DEF/GDS数据交互方式相比,Mixed Signal Open Database(MSOA) RapidPDK可以帮助设计人员通过相同的PDK更好地完成数字工具Innovus和模拟工具Virtuoso之间的数据传递。 Virtuoso-innovus flow with MSOA RapidPDK allows for all or parts of the physical hierarchy to pass back and forth between Virtuoso and Innovus easily without having to generate a DEF/ GDS file.
15128 首先描述了5 nm MSOA RapidPDK生成方式,其次使用生成的PDK实现5 nm IP物理实现,同时验证MSOA flow对5 nm设计在版图完成和交付方面的速率提升。 In this paper, we firstly describe the way to generate 5 nm RapidPDK, then use this PDK with digital flow to finish 5 nm IP de-sign with custom lib.
15129 HBM(高带宽内存)存储系统与传统的DRAM接口相比,具有高速率和低功耗特性。 Compared with the traditional DRAM interface, the HBM( High Bandwidth Memory) storage system has the characteristics of high speed and low power consumption.
15130 在2.5D/3D的设计中,随着HBM速率的提高,对信号与电源完整性的设计的考量越来越重要,如何通过有效的仿真指导产品的设计是一个挑战。 In the design of 2. 5 D/3 D, as the rate of HBM increases, the design considerations of signal and power integrity are becoming more and more important. How to guide the design of products through effective simulation is a challenge.
15131 首先从信号完整性的角度讨论了设计的考量点,其次从电源完整性的角度讨论电源噪声在高速传输信号中的影响,并提出了如何仿真与预测大量同步开关噪声等电源噪声对眼图的影响。 The article firstly discusses design considerations from the perspective of signal integrity, then discusses the impact of power supply noise on high-speed transmission signals from the perspective of power integrity and proposes how to simulate and predict the effects of Simultaneous Switch noises.
15132 最后基于芯片的测试结果对比仿真,给出结论。 Finally based on the silicon chip, simulations have well correlated and verified by test results.
15133 随着工艺尺寸的不断缩小,电路规模的不断复杂化以及版图中寄生规模的不断增大,在一些大规模的后仿验证过程中,Cadence公司提供的模拟全精度仿真器Spectre/APS/APS RF已不能满足需求。 With the continuous shrinking of process nodes, the continuous complexity of the circuits designs and the increasing size of the parasitics from layout, the analog FULL-SPICE simulator Spectre/APS/APS RF provided by Cadence can no longer meet the demand in some large-scale post-simulation verification projects.
15134 针对这一问题,Cadence于2019年推出APS的下一代模拟全精度仿真器Spectre X,在实际使用过程中发现其对普通模拟仿真性能提升明显并且基本保持了APS的仿真精度。 In response to this problem, Cadence launched APS ′ s next-generation analog full-spice simulator Spectre X in 2019. It was found that it has significant performance improvement on general ana-log simulations while maintained the proven golden accuracy of APS.