ID 原文 译文
15115 现场可编程门阵列(Field Programmable Gate Array,FPGA)原型验证平台容量的限制,以及需要修改时钟树等特性导致FPGA平台并不适合做功耗/性能评估。 At the same time, the capacity of the FPGA prototype verification platform is limited, and some clock trees need to be modified and are not suitable for power/performance evaluation.
15116 基于Emulator平台的仿真加速以及功耗/性能评估已经成为一种趋势。 Simulation acceleration and power analysis and performance evaluation based on Emulator platform have become a trend.
15117 可以使用Emulator的加速验证知识产权(Accelerated Verification Intellectual Property,AVIP)替换软件仿真用的验证知识产权(Verification Intellectual Property,VIP)来做仿真加速。 Based on the emulator AVIP to simulate or monitor relat-ed bus transaction can be used to do the related work of function/ power/ performance which can greatly accelerated the process of chip development.
15118 以及使用高级微控制器总线结构(Advanced Micro-controller Bus Architecture, AMBA) AVIP来模拟或者监控总线的传输,结合其他工具可以用来做功能/功耗/性能相关的验证工作,大大加速了芯片相关开发验证的进程。 The test cases developed based on MIPI AVIP for verifying MIPI or using MIPI to verify the internal image pro-cessing module achieves dozens of times of acceleration ratio and greatly improves the simulation speed.
15119 基于移动行业处理器接口(Mobile Industry Processor Interfac...更多 As well as using AVIP to simulate and monitor the behavior of related modules, can get the netlist power data and performance data. It has made an important contribution to the functional verification and power/performance optimization of the chip.
15120 传统的静态时序分析会将电压的不一致性作为减弱参数形式,以一定的余量帮助使用者覆盖大部分真实芯片中的情况。 When we use traditional timing signoff (STA) with a proper margin or derate for voltage variations, it will help us to cover most scenarios of real silicon.
15121 但是随着芯片越来越大,软硬件的功能越来越多,由于电压降引起的时序违例越来越多。 But as chips are designed larger and larger, features of hardware and software increase more and more, we see some critical cases will lead timing to fail caused by IR drop, even if IR analysis is under criteria.
15122 很多情况下IR的分析是符合标准的。现在主流的大规模芯片如AI芯片都是基于12 nm、7 nm或者更小的技术节点。 Now, most of our designs such as AI chips are designed on 12 nm, 7 nm or less, with a 3 DIC interposer.
15123 封装还会引入3DIC。电压降分析越来越复杂也越来越重要。 IR drop analysis is more and more complex and important.
15124 与此同时,时序分析也将会引入电压降的影响。 Meanwhile, timing analysis with IR drop is request.