ID 原文 译文
15105 对该方法及系统进行了详细设计和说明,据此即可进行代码编写、电路设计等产品化设计工作。 According to this, the product design work such as code writing and circuit design can be carried out.
15106 基于本方法及系统的电子门锁适用范围宽、解锁便捷,并具有更好的安全性、更高的性价比,对电子门锁或智能门锁行业的发展将会产生重要影响。 The electronic door lock based on this method and system has wide application range, convenient unlocking, better security and higher cost performance ratio, which will have an important impact on the development of electronic door lock or smart door locks industry.
15107 在先进工艺节点下,芯片电源网络的电阻增加和高密度的晶体管同时翻转会在VDD和VSS上产生电压降(IR Drop),导致芯片产生时序问题和功能性障碍。 At the advanced process nodes, due to resistive power grid and simultaneous switching of close instances, there is a voltage reduction( IR drop) on VDD nets and an increase on VSS nets.
15108 采用基于Innovus工具的三种自动化IR Drop修复流程在PR(Placement and Route)阶段优化模块的动态IR Drop。 IR drop may cause timing issues and functional failures of chips. In this paper, three automatic IR drop fixing flows based on Innovus implementation system were used to avoid and fix the possible dynamic IR drop issues during the PR( Placement and Route) stage.
15109 结果表明,Pegasus PG Fix Flow和IR-Aware Placement这两种方法能分别修复设计的48%和33.8%的IR Drop违例,且不会恶化时序和DRC (Design Rule Check),而IR-Aware PG Strape Addition这种方法的优化力度相对较小,且会使DRC有较大程度的恶化。 The results show that the Pegasus PG fix flow and IR-Aware placement flow could reduce the IR drop violations of 48. 0 % and 33. 8 % respectively, and would not deteriorate the timing and DRC( Design Rule Check). However, the optimization effect of IR drop issues was relatively small with IR-Aware PG strape addition flow and DRC greatly deteriorated.
15110 介绍了验证管理工具vManager,通过Python调用vAPI接口与企业级的产品需求管理工具Microsoft TFS和用户数据后台对接,实现了从自动创建验证需求框架(即vPlan)自动执行回归验证,自动提取验证结果反标回Microsoft TFS中的需求状态,自动提取验证结果呈现到验证看板的自动化验证管理全流程。 This paper introduces the verification management tool vManager, which calls the vAPI interface througt Python to inter-connect with the enterprise-level product requirements management tool Microsoft TFS and user data, realizes the automatic imple-mentation of regression verification from automatic creation of the verification requirements framework(i.e.vPlan), automatically annotates the verification results to the requirements state in Microsoft TFS, and automatically extracts the verification results and presents it to the automated verification management process of the verification dashboard.
15111 方案旨在自动化、规范化地实现验证需求到vPlan的同步,验证回归状态和覆盖率的实时汇总,实现验证的高效率和高透明度,需求跟踪达到滴水不漏。 The purpose of this scheme is to automate and stan-dardize the synchronization of verification requirements to vPlan, real-time summary of regression status and coverage, achieve high efficency and transparency of verification, and make the requirement tracking perfect.
15112 该方案还采用了vManager最新一代的High Available模式,可实现跨地域的多团队合作与数据共享,并且部署了多引擎验证工具包括Xcelium、JapserGold和Palladium的验证管理,实现了多维度的验证数据汇总。 The scheme also adopts the lastest generation High-Available mode of vManager to realize cross-regional multi-team cooperation and data sharing.
15113 目前该方案已经部署到真实的研发环境中,为vManager在国内比较领先的应用,为业内提供"跨地域合作+多个仿真引擎"的大规模验证方案提供了非常有价值的参考。 In addition, the multi-engine verification tools including Xcelium, JasperGold and Palladium are deployed to realize muti-dimensional verification data collection.Currently, the solution has been deployed in a real R&D environment, it porovides a valuable reference for vManager ′s leading application in China and for large-scale verification solutions of cross-regional cooperation, multiple simulation engines in the industry.
15114 由于片上系统芯片(System on Chip,SoC)规模越来越大,软件仿真速度在一些大的场景测试用例下已经很难满足验证计划时间的要求。 Due to the increasing scale of the chip, the EDA simulation speed has been difficult to meet the schedule requirements in some large scene cases.