ID 原文 译文
12274 同时，采用热运动的麦克斯韦ー玻耳兹曼分布对器件局域失配进行讨论计算,认为注入杂质热运 动引起的扩散是导致因离子注入随机波动引起器件局域失配的主导因素。 Meanwhile, the Maxwell-Boltzmann distribution of the thermal motion was used to discuss and calculate the local mismatch of the device,revealing that the diffusion caused by the thermal motion of the implanted impurity is the dominant factor leading to the device local mismatch due to the random dopant fluctuation .
12275 针对大量 IP 硬核精准、快速的测试验证需求，在分析现有 IP 硬核测试技术的基础上，研究了 IP 硬核无损测试技术。 Based on the analysis of the existing hard IP core testing technology，the hard IP corenondestructive testing technology was studied in order to meet the requirements of accurate and rapid testand verification of a large number of hard IP core．
12276 通过设计模拟用户片上系统 ( SOC) 的通用评估系统，将被测 IP 硬核嵌入在测试电路中，并引入软硬件补偿结构，对信号时序进行校准补偿，对 IP 硬核精确输入进行控制和监测。 By designing a general evaluation system of simulatinguser system on chip ( SOC), the tested hard IP core was embedded in the test circuit．And the softwareand hardware compensation structures were introduced to calibrate and compensate the signal timing，control and monitor the input signal of hard IP core accurately．
12277 结合外部自动测试设备 ( ATE) 与片上评测电路，实现对 IP 硬核的功能、性能以及可靠性等的精确验证。 Combined with the external automatic testequipment ( ATE) and the on-chip evaluation circuit，the function，performance and reliability of thehard IP core could be verified accurately．
12278 实际完成了一款基于片上评测电路的静态随机存储器( SＲAM) IP 硬核测试设计与验证，实现该 IP 硬核关键时序参数测试，以数据建立时间这一参数为例，分析了其具体测试方法并得到测试结果。 The design and verification of a static random access memory( SＲAM) hard IP core test based on an on-chip evaluation circuit was actually completed，and the keytiming parameters of the hard IP core were tested． The parameter of data setup time was taken as an example to analyze the specific testing method and the test results were obtained．
12279 采用该测试技术，IP 硬核时间参数的测试精度可达 ps 级，相较于 IP 硬核封装后测试，充分体现了结果数据的精确性。 The accuracy of testingthe time parameters of hard IP core can reach ps level by using this technology． Compared with the hard IP core packaged test，the accuracy of the result data is fully reflected．
12280 针对 U 型沟槽 MOSFET ( UMOSFET) 功率器件栅极和源极间发生漏电失效的问题，对失效器件进行了电学测试和缺陷检测，对失效现象和失效机理进行了分析，并进行了相关工艺模拟和工艺实验。 The electrical test and defect detection were carried out on the failure device to verify theproblem of leakage failure between the gate and the source of the U-shaped trench MOSFET ( UMOSFET) power device． The failure phenomenon and failure mechanism of the UMOSFET were analyzed，and the related process simulation and the process experiment were carried out．
12281 采用透射电子显微镜 ( TEM) 、扫描电子显微镜 ( SEM) 和聚焦离子束 ( FIB)对失效芯片的缺陷进行分析和表征。 The defects of failure chips were analyzed and characterized by transmission electron microscope ( TEM) ，scanning electron microscope( SEM) and focused ion beam (FIB).
12282 结果表明，器件的 U 型沟槽底部栅氧化层存在的缺陷是产生漏电的主要原因，湿氧工艺中反应气体反式二氯乙烯 ( Trans_LC) 的残留碳化造成了芯片栅氧层中的缺陷。 The results show that the defects in the gate oxide layer of theU-shaped trench bottom of the device are the main cause of the leakage, and defects in the oxide layer ofthe chip induced by the residual carbonization of the reaction gas trans-dichloroethylene ( Trans_LC) in the wet oxidation process．
12283 通过工艺模拟和实验，优化了湿氧工艺条件，工艺改进后产品的成品率稳定在98% ～99%，无漏电失效现象。 The conditions of wet oxidation process were optimized by process simulation and experiment． After process improvement，the product yield is remained at 98%－99%，and no leakagefailure is occurred for UMOSFETs．